Fujitsu and Denali Software Collaborate to Develop DFI Compatible DDR PHY Macro
Fujitsu Limited and Denali Software, Inc. today announced their co-development of a DDR DRAM physical interface (DDR PHY)(1)product compatible with the recently announced DDR-PHY Interface (DFI) version 1.0 specification. The DDR PHY utilizes the DFI specification which defines a common interface between the conventional proprietary memory controller logic and DDR PHY designs, which reduces design and integration costs for developing DDR DRAM memory systems, and reduces overall time-to-market.
“DDR DRAM memory system design has emerged as a significant design challenge that affects a wide range of applications, spanning communications, computing, networking, and consumer electronics such as digital audio-videos,” said Brian Gardner, vice president of IP products at Denali Software. “A key part of the solution involves decoupling the DDR PHY design, which is highly process dependent and timing sensitive, from the DDR controller logic design, which is driven by system performance requirements. The DFI specification provides a clean boundary between these two memory system components, and enables developers to use best-in-class PHY and memory controller designs. Fujitsu’s new DFI compatible DDR PHY designs are a demonstration of state-of-the-art solutions for ASIC development, and provide customers with a significant advantage in DDR memory system development.”
The DFI compatible DDR PHY product, co-developed with Fujitsu VLSI Limited(2), is delivered as a macro to customers using Fujitsu’s 90-nm process technology or further advanced technologies. In addition to 90-nm, Fujitsu is planning to utilize this DDR PHY product for other Fujitsu proprietary process technologies including generations previous to 90-nm. Furthermore, Fujitsu’s DDR PHY macro has been verified with Denali’s DFI compatible Databahn™ DDR controllers, enabling customers with a complete memory system solution.
“Denali Software is not only a leader in preparing the DFI specification, but also has a good track record for releasing many high-quality DDR controllers. Collaborating to verify the interface between Fujitsu’s DDR PHY and Denali’s DDR controllers shows a significant achievement in terms of providing customers with high-quality and interoperable DDR systems with low risk,” said Yoshio Watanabe, General Manager of the IP Platform Solutions Division, Electronic Devices Business Unit of Fujitsu Limited.
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