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STMicroelectronics to Offer Chinese Universities Access to Leading-Edge CMOS Processes Through CMP


Initiative aims at strengthening ST’s links with Chinese education and research communities and developing innovative design capabilities by allowing organizations to obtain advanced ICs in quantities and at costs compatible with academic budgets

Shanghai, May 2008 - STMicroelectronics (NYSE:STM), one of the world’s largest semiconductor manufacturers, and CMP(Circuits MultiProjects®), a leading broker in ICs, today announced that the two companies are offering Chinese universities access to STMicroelectronics’ most advanced CMOS processes for academic and research purposes.

Based on the success of this offering with European and North American universities, with more than 100 universities having now received design rules and design kits for ST’s 65nm bulk CMOS process, and several hundreds of designs in various technologies, ST and CMP are putting in place the infrastructure required to duplicate this success in China. In 2007, approximately 180 circuit designs from European and NorthAmerican universities, in both 90nm and 65nm technologies, were put through ST’s silicon process for various applications, including 3G wireless, telecom, RF and power management.

Key elements of the initiative are that ST will ensure the certification of the local partners and the fabrication of the ICs designed by the universities, while CMP will be the interface for commercial and technical aspects, from the distribution and support of the CAD software tools and design kits, up to the delivery of the samples. This mechanism will allow Chinese research organizations to obtain small quantities of advanced ICs, typically a few tens of units, at an attractive cost compatible with an academic budget. The availability of real silicon to Chinese education and research communities will enable them to validate design ideas and increase their design skills and capabilities. Additionally, it will enable them to promote and sell validated IP and garner opportunities for the commercialization of designs.

The ST process technologies available via CMP include 120nm, 90nm and 65nm CMOS technologies, with multiple transistor flavors from ultra-low leakage to high-speed and complete standard cells and I/Os libraries. The offering will be extended in the future to more technologies and options.

ST has a long history of working with universities and academia across the world through joint IC design projects and lab sponsorship. In China, ST has development projects currently ongoing with TsinHua University, TongJi University and ICT. The access to ST’s advanced processes, via CMP, will boost the design and engineering capabilities in China - a key market worldwide for semiconductors and increasingly a focal point for R&D, in addition to the availability of a rich pool of talent for advanced IC design.

According to Bernard Courtois, Director of CMP, there has been sharp growth in the number of advancedCMOS designs produced via CMP’s services in recent years. For example, in 2007, the total number of circuits designed in 90nm CMOS increased by almost 100%, with 91 circuits designed in 2007 compared to 57 in 2006 and 32 in 2005, and most of the top universities are now preparing designs in 65nm.

“ST believes that it is increasingly important that university students and researchers worldwide have access to the most advanced technologies for the future benefit of the semiconductor industry, in addition to reinforcing opportunities for academic and research communities,” said Laurent Perier, Director, China IC Design Centers, STMicroelectronics. “Ensuring that Chinese universities have access to our leading-edge technologies is testimony of our commitment to work with Chinese partners in their path towards innovation.”


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